The present invention relates to a method for forming an interconnection of a semiconductor device which improves resistance and reliability of the semiconductor device.
In general, an aluminum and an alloy thin film made thereof have a high electric conductivity and a good pattern formation by a dry etching. Further, their adhesion to a silicon oxide film is good and the cost is relatively low. Thus, they are widely used as a material for forming the interconnection of a semiconductor circuit.
However, as the number of integrations for forming an integrated circuit increases, the size of semiconductor devices is reduced and their interconnections become finer and multi-layers. Thus, in parts of the semiconductor devices having a certain topology or the inside of a contact or via hole, step coverage becomes an important issue.
For example, a connecting hole becomes narrower as the size of the semiconductor device decreases. The narrow connecting hole has an aspect ratio (hole height/hole width) of greater than one. Thus, using a conventional sputtering method to deposit an interconnection film in the narrow connecting hole results in an uneven deposition, which can degrade the operation of the connecting hole, for example, by causing an open circuit. Such a poor step coverage arising due to a shadow effect should be avoided.
Accordingly, instead of the conventional sputtering method, there is introduced a chemical vapor deposition (CVD) method which can provide a uniform thickness deposition and thus a good step coverage. For a chemical vapor deposition, a tungsten film is used. Thus, researches to forming a tungsten film using a low pressure chemical vapor deposition (LPCVD) method has been progressed.
However, the resistance of the tungsten interconnection film is twice more than that of the aluminum interconnection film, so that it is difficult to actually apply and pattern the tungsten film as an interconnection film. To overcome this problem, forming a plug in a connecting hole has been suggested.
As one of the methods for forming a plug, a tungsten film is selectively grown on a substrate exposed in a connecting hole by applying a selective chemical vapor deposition method. In another method, after forming a barrier metal film or an adhesive layer, a tungsten film is deposited on the entire surface and etched back to a desired thickness to form the plug.
However, in the above selective growth method, it is not easy to prevent the tungsten film from growing on an insulating film surrounding the connecting hole. In the etching back method, it is necessary to form a reliable barrier layer or adhesive layer in the connecting hole with the high aspect ratio. To do this, a collimator or a CVD method is used. However, in such a case, a minimum thickness sufficient to cause a nuclear generation of the tungsten in the bottom or sidewall of the connecting hole should be secured. Here, the top surface of the connecting hole is actually positioned higher than that of the plug since the depth of the connecting hole is variable according to the degree of planarization of the insulating film.
On the other hand, if a CVD method is used to form an aluminum interconnection, the step coverage can be improved. At the same time, peripheral processes related to the technology of forming an aluminum interconnection using the conventional sputtering method can be utilized.
Nevertheless, copper has a resistance lower than that of the aluminum and a good electromigration or stressmigration characteristic, thereby offering good reliability. Accordingly, methods for forming an copper interconnection using a sputtering or CVD method have been researched.
However, if a halogen compound useful for etching the aluminum were applied to copper, the operation temperature for the copper should be raised to about 500.degree. C. to obtain an applicable etch rate, since the vapor pressure of the halogen compound is low. Thus, instead of using a direct patterning through etching, a trench is formed in the shape of an interconnection pattern within a substrate to form the copper interconnection. Then the copper is deposited and etched back by a chemical mechanical polishing (CMP) method to form a buried conductive line. Alternatively, a method is suggested where a plug is selectively formed through a vertical growth using a lower conductive layer of a contact or via hole as a seed.
For forming a buried conductive line, a method has been suggested where a contact plug and a conductive line are self-aligned to uniformly maintain the contact area between the plug and the line. This forms a buried interconnection which has an improved contact resistance and integration capability.
Hereinafter, the conventional method for forming an interconnection of a semiconductor device will be described with reference to the attached drawing.
FIGS. 1a to 1f are cross-sectional views for illustrating the conventional method for forming an interconnection of a semiconductor device.
To begin with, as shown in FIG. 1a, an insulating layer 3 is formed on a substrate 1 on which a lower conductive layer 2 is formed.
As shown in FIG. 1b, a first photoresist 4 is coated on the insulating layer 3 and patterned so as to expose a portion of the lower conductive layer 2.
Using the patterned first photoresist 4 as a mask, the insulating layer 3 is selectively removed to form a connecting hole 5 for connecting the lower conductive layer 2 with an upper conductive layer which will be formed by the subsequent processes.
As shown in FIG. 1c, after removing the first photoresist 4, a second photoresist 6 is coated and patterned on the patterned insulating layer 3. Using the patterned second photoresist 6 as a mask, the insulating layer 3 is selectively removed to form a trench 7 for forming the upper conductive layer.
As shown in FIG. 1d, after removing the second photoresist 6, a barrier layer 8 made of a high refractory metal or a compound thereof is formed on the insulating layer 3 and the exposed lower conductive layer 2. Here, a titanium (Ti) can be used as the high refractory metal and a titanium nitride (TiN) can be used as its compound.
As shown in FIG. 1e, using a CVD or electrolytic deposition method, a conductive material such as copper is formed on the barrier layer 8, thereby forming an upper conductive layer 9 filling the connecting hole 5 and trench 7.
As shown in FIG. 1f, through a CMP (Chemical Mechanical Polishing) method, the upper conductive layer 9 is etched back until the surface of barrier layer 8 is exposed. This completes the conventional process of forming an interconnection of a semiconductor device. However, the aforementioned conventional method for forming an interconnection of a semiconductor device has many problems. For example, as interconnection becomes narrower and finer, the area of the connecting hole is reduced. This increase the amount of buried conductive material (having a high resistance) compare to the size of the connecting hole. As a result, the resistance of the buried interconnection increases and the reliability of the semiconductor device is deteriorated.